? semiconductor components industries, llc, 2011 september, 2011 ? rev. 0 1 publication order number: P3P8163A/d P3P8163A 3.3v, lvcmos spread spectrum peak emi reduction device product description P3P8163A is a 3.3 v, spread spectrum frequency modulator that generates a 1x, lvcmos low emi spread spectrum clock and two reference clock outputs. the P3P8163A reduces electromagnetic interference (emi) at the clock source, allowing system wide reduction of emi of down stream clock and data dependent signals. it allows significant system cost savings by reducing the number of circuit board layers, ferrite beads, shielding, and other passive components that are traditionally required to pass emi regulations. the P3P8163A can generate an emi reduced clock from a fundamental crystal or from an external reference clock. P3P8163A has a sel pin to turn off clk2 when ?1?. refer output table. P3P8163A operates over 3.3 v 5% supply voltage range and is available in 8 pin soic package. features ? input clock: 12 mhz from fundamental xtal or external reference clock ? output clocks: clk0: 12 mhz 0.4% clk1, clk2: 12 mhz (refout) ? sel pin to turn off clk2 ? low inherent cycle ? to ? cycle jitter ? supply voltage: 3.3 v 5% ? lvcmos input and output ? operating temperature range: 0 c to 70 c ? 8 ? pin soic package ? these devices are pb ? free, halogen free/bfr free and are rohs compliant application ? the P3P8163A is targeted towards emi management in consumer electronics applications including mfps. vdd clk2 gnd sel xin/clkin clk1 pll + frequency modulator xout clk0 crystal oscillator figure 1. simplified block diagram 8 1 7 43 6 5 2 soic ? 8 d suffix case 751 marking diagram http://onsemi.com xx = specific device code a = assembly location l = wafer lot y = year w = work week = pb ? free package alyw 1 8 1 8 see detailed ordering and shipping information in the package dimensions section on p age 5 of this data sheet. ordering information
P3P8163A http://onsemi.com 2 figure 2. pin configuration clk1 clk2 v dd xout xin/clkin clk0 sel gnd 1 2 3 45 6 7 8 table 1. pin description pin # pin name type description 1 xin / clkin input crystal connection or external clock input. 2 clk0 output spread spectrum clock output. 3 sel input 2 level logic input. when ?0? clk2 is enabled. when ?1? clk2 is turned off. has a pull ? down resistor. 4 gnd power ground to entire chip. 5 clk1 output reference clock output. 6 clk2 output reference clock output. has a pull ? down resistor when off. 7 v dd power power supply for the entire chip 8 xout output crystal connection. if using an external reference, this pin must be left unconnected. table 2. output table sel clk0 clk1 clk2 0 spread spectrum clock output reference clock output reference clock output 1 spread spectrum clock output reference clock output off table 3. operating conditions symbol description min max unit v dd voltage on any pin with respect to gnd 3.135 3.465 v t a operating temperature 0 +70 c c l load capacitance 15 pf c in input capacitance 7 pf
P3P8163A http://onsemi.com 3 table 4. maximum ratings symbol parameter rating unit v dd , v in voltage on any pin with respect to ground ? 0.5 to +4.6 v t stg storage temperature ? 65 to +125 c t s max. soldering temperature (10 sec) 260 c t j junction temperature 150 c t dv static discharge voltage(as per jedec std 22 ? a114 ? b) 2 kv stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. note: these are stress ratings only and are not implied for functional use. exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. table 5. dc electrical characteristics (note ? unless otherwise stated v dd = 3.3 v 5%, c l = 15 pf and ambient temperature range 0 c to +70 c) symbol parameter min typ max unit v dd supply voltage 3.135 3.3 3.465 v i dd dynamic supply current (c l = 15 pf, v dd = 3.465 v, temp = +70 c) 17 ma v il input low voltage (xin/clkin, sel inputs) 0 0.8 v v ih input high voltage (xin/clkin, sel inputs) 0.9 * v dd v dd v v ol output low voltage (clk[0:2]) i ol = 12 ma 0.4 v v oh output high voltage (clk[0:2]) i oh = ? 12 ma 2.4 v c in1 input capacitance (xin/clkin and xout) 6 pf c in2 input capacitance (sel input) 7 pf r pd internal pull down resistor (clk2) 200 k z 0 output impedance 25 note: the voltage on any input or i/o pin cannot exceed the power pin during power up.
P3P8163A http://onsemi.com 4 table 6. ac electrical characteristics (note ? unless otherwise stated v dd = 3.3 v 5%, c l = 15 pf and ambient temperature range 0 c to +70 c) symbol parameter min typ max unit f in input clock frequency 12 mhz f out clk0, modulated output clock, 0.4% 12 mhz clk1, clk2 reference clock output 12 t lh, t hl (notes 1 and 2) clk0, rise and fall time (measured between 20% to 80%) 1.25 2.0 ns t lh, t hl (notes 1 and 2) clk1, clk2, rise and fall time (measured between 20% to 80%) 1.25 2.0 ns t dcout (notes 1 and 2) output clock duty cycle 45 50 55 % t jc (note 2) cycle ? cycle jitter, peak (1000 cycles) (for clk0) 150 ps t jp (note 2) period jitter, peak (10000 cycles) (for clk1, clk2) 125 ps t on (notes 1 and 2) power up time (stable power supply, valid input clock to valid clock on clk0). 4 ms f dvar frequency deviation (clk0) 0.4 0.52 % 1. parameters are specified with 15 pf loaded outputs. 2. parameter is guaranteed by design and characterization. not 100% tested in production rx c l c l crystal r figure 3. typical crystal interface circuit c l = 2*(c p ? c s ), where c p = load capacitance of crystal specified in a crystal datasheet cs = stray capacitance due to cin, pcb, trace etc c l =load capacitance to be used rx is used to reduce power dissipation in the crystal
P3P8163A http://onsemi.com 5 c4, 2.2 f c3, 0.1 f sel xout xin gnd clk1 v dd P3P8163A y1 v dd c2 v dd clk0 c1 rs rs rs clk2 figure 4. typical application schematic 1 8 3 2 5 6 4 7 rs = trace impedance of pcb ? output impedance of device (z0) ordering information device top marking temperature package shipping ? P3P8163Ag ? 08sr cul 0 c to +70 c soic ? 8 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
P3P8163A http://onsemi.com 6 package dimensions soic ? 8 nb case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 P3P8163A/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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